Fine-grained multi-phase array designs

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Manjunathaiah, M. (2013) Fine-grained multi-phase array designs. Journal of Parallel and Distributed Computing, 73 (8). pp. 1076-1082. ISSN 0743-7315 doi: 10.1016/j.jpdc.2013.03.003

Abstract/Summary

Hybrid multiprocessor architectures which combine re-configurable computing and multiprocessors on a chip are being proposed to transcend the performance of standard multi-core parallel systems. Both fine-grained and coarse-grained parallel algorithm implementations are feasible in such hybrid frameworks. A compositional strategy for designing fine-grained multi-phase regular processor arrays to target hybrid architectures is presented in this paper. The method is based on deriving component designs using classical regular array techniques and composing the components into a unified global design. Effective designs with phase-changes and data routing at run-time are characteristics of these designs. In order to describe the data transfer between phases, the concept of communication domain is introduced so that the producer–consumer relationship arising from multi-phase computation can be treated in a unified way as a data routing phase. This technique is applied to derive new designs of multi-phase regular arrays with different dataflow between phases of computation.

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Item Type	Article
URI	https://reading-clone.eprints-hosting.org/id/eprint/33300
Identification Number/DOI	10.1016/j.jpdc.2013.03.003
Refereed	Yes
Divisions	Science > School of Mathematical, Physical and Computational Sciences > Department of Computer Science
Uncontrolled Keywords	Systolic array Polyhedral model Multi-phase design
Publisher	Elsevier
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Deposit Details

Date Deposited:	26 Jul 2013 12:18	Date item deposited into CentAUR
Last Modified:	23 Jun 2024 03:32	Date item last modified

References

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